sci-electronics/yosys
framework for Verilog RTL synthesis
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yosys-9999
yosys-0.56
yosys-0.56
!readline?
( libedit?
( dev-libs/libedit:= )
)
readline?
( sys-libs/readline:= sys-libs/ncurses:= )
dev-lang/tcl:=
python?
( python_single_target_python3_11?
( dev-libs/boost[python_targets_python3_11
(-)
] )
python_single_target_python3_12?
( dev-libs/boost[python_targets_python3_12
(-)
] )
python_single_target_python3_13?
( dev-libs/boost[python_targets_python3_13
(-)
] )
)
libffi?
( dev-libs/libffi )
sys-libs/zlib
python?
( python_single_target_python3_11?
( dev-lang/python:3.11 )
python_single_target_python3_12?
( dev-lang/python:3.12 )
python_single_target_python3_13?
( dev-lang/python:3.13 )
)
media-gfx/xdot