sci-electronics/nvc
NVC is a VHDL compiler and simulator
USE Flags
llvm
Global: Add support for compiling to the low-level virtual machine (llvm)
test
Global: Workaround to pull in packages needed to run with FEATURES=test. Portage-2.1.2 handles this internally, so don't set it in make.conf/package.use anymore
+llvm_slot_22
* This flag is undocumented *
llvm_slot_20
* This flag is undocumented *
llvm_slot_21
* This flag is undocumented *


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