sci-electronics/iverilog
A Verilog simulation and synthesis tool
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iverilog-12.0amd64 ~arm ~arm64 ~ppc ~ppc64 ~riscv ~x86
View Download Browse License: LGPL-2.1Overlay: gentoo -
iverilog-12.0~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86
View Download Browse License: LGPL-2.1Overlay: vowstar -
iverilog-11.0amd64 ~arm ~arm64 ~ppc ~ppc64 ~riscv ~x86
View Download Browse License: LGPL-2.1Overlay: gentoo -
iverilog-11.0~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86
View Download Browse License: LGPL-2.1Overlay: vowstar -
iverilog-10.3-r1~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86examples
View Download Browse License: LGPL-2.1Overlay: vowstar
Reverse Dependencies
Reverse dependancies are sometimes conditional based on your USE flags, Ebuild version and sometimes other packages. please keep this in mind.