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sci-electronics/circt

The fast free Verilog/SystemVerilog simulator

Screenshots

  • circt-1.76.0
    ~amd64 ~arm64 ~riscv ~x86
    test python_targets_python3_11 python_targets_python3_12

    View      Download      Browse     License: Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc   
    Overlay: guru
  • circt-1.37.0
    ~amd64 ~arm64 ~riscv ~x86
    test python_targets_python3_10 python_targets_python3_11 python_targets_python3_12

    View      Download      Browse     License: Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc   
    Overlay: vowstar
  • circt-1.37.0
    ~amd64 ~arm64 ~riscv ~x86
    test python_targets_python3_11 python_targets_python3_12

    View      Download      Browse     License: Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc   
    Overlay: guru
  • circt-1.14.0
    ~amd64 ~arm64 ~riscv ~x86
    test python_targets_python3_11 python_targets_python3_12

    View      Download      Browse     License: Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc   
    Overlay: guru
  • circt-1.14.0
    ~amd64 ~arm64 ~riscv ~x86
    test python_targets_python3_10 python_targets_python3_11 python_targets_python3_12

    View      Download      Browse     License: Apache-2.0-with-LLVM-exceptions UoI-NCSA BSD public-domain rc   
    Overlay: vowstar

ChangeLog

commit fe47557fbada13a64eacab72846fd49a0530959f
Author: Yuhang Zeng <unlsycn@unlsycn.com>
Date: Thu Jun 13 00:29:47 2024 +0800

sci-electronics/circt: enable py3.12 and disable py3.10

Signed-off-by: Yuhang Zeng <unlsycn@unlsycn.com>

commit a9ac3703f6192a17e1043c7d1a2d56bb7c937420
Author: Yuhang Zeng <unlsycn@unlsycn.com>
Date: Thu Jun 13 00:26:34 2024 +0800

sci-electronics/circt: add 1.76.0

Signed-off-by: Yuhang Zeng <unlsycn@unlsycn.com>

commit 12088906c597f38640e866db39c7ba6dea3f5ec0
Author: Anna (cybertailor) Vyalkova <cyber+gentoo@sysrq.in>
Date: Tue May 2 00:45:35 2023 +0500

*/*: drop dead py3.9 impl

Signed-off-by: Anna (cybertailor) Vyalkova <cyber+gentoo@sysrq.in>

commit 4506f0738c3ce8c349bf0a15e96aafb26a9d244a
Author: Huang Rui <vowstar@gmail.com>
Date: Fri Mar 31 14:00:14 2023 +0800

sci-electronics/circt: add 1.37.0

Signed-off-by: Huang Rui <vowstar@gmail.com>

commit 41008d715cc7b84056a64933f14288647f14b6fa
Author: Anna (cybertailor) Vyalkova <cyber+gentoo@sysrq.in>
Date: Sun Mar 12 17:53:56 2023 +0500

*/*: drop dead py3.8 impl

Signed-off-by: Anna (cybertailor) Vyalkova <cyber+gentoo@sysrq.in>

commit 3201cb523db3fccf19cf655d3cd4720214c0cd93
Author: Huang Rui <vowstar@gmail.com>
Date: Tue Sep 6 10:20:55 2022 +0800

sci-electronics/circt: improve ebuild style

Optimized and improved according to @tastytea suggestions

See also: https://github.com/gentoo/guru/commit/bfcb1aadadf0596996c72382a25c3d405a33cac3
Signed-off-by: Huang Rui <vowstar@gmail.com>

commit 005e124245299c2984352564deac51a6385311d7
Author: Huang Rui <vowstar@gmail.com>
Date: Sun Aug 28 12:56:16 2022 +0800

sci-electronics/circt: fix source file path

Signed-off-by: Huang Rui <vowstar@gmail.com>

commit bfcb1aadadf0596996c72382a25c3d405a33cac3
Author: Huang Rui <vowstar@gmail.com>
Date: Sun Aug 28 03:20:07 2022 +0800

sci-electronics/circt: new package, add 1.14.0

Signed-off-by: Huang Rui <vowstar@gmail.com>