sci-electronics/adms
ADMS is a code generator for the Verilog-AMS language
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commit 40063e83e91198617af507bb12c919b1d6a5de37
Author: Sergey Alirzaev <l29ah@riseup.net>
Date: Sat Jan 18 15:14:14 2025 +0100
sci-electronics/adms: updated
commit f72458bfa125ee181109299fc8dcd25726715f55
Author: Sergey Alirzaev <zl29ah@gmail.com>
Date: Wed Jul 18 15:26:23 2018 +0300
+ adms: new ebuild
Author: Sergey Alirzaev <l29ah@riseup.net>
Date: Sat Jan 18 15:14:14 2025 +0100
sci-electronics/adms: updated
commit f72458bfa125ee181109299fc8dcd25726715f55
Author: Sergey Alirzaev <zl29ah@gmail.com>
Date: Wed Jul 18 15:26:23 2018 +0300
+ adms: new ebuild