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sci-electronics/abc

ABC: System for Sequential Logic Synthesis and Formal Verification

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  • abc-1.01_p20220701
    ~amd64

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ChangeLog

commit 9a2c292706f8e5823712f785d271ee2a9cb46f7f
Author: Thomas Schneider <qsx@chaotikum.eu>
Date: Wed Jul 27 17:21:20 2022 +0200

sci-electronics/abc: Add ebuild